{"id":13999,"date":"2025-03-21T08:00:41","date_gmt":"2025-03-21T08:00:41","guid":{"rendered":"https:\/\/bvcoend.ac.in\/?page_id=13999"},"modified":"2026-03-20T05:12:01","modified_gmt":"2026-03-20T05:12:01","slug":"network-analysis-and-synthesis-nas-labece","status":"publish","type":"page","link":"https:\/\/bvcoend.ac.in\/index.php\/network-analysis-and-synthesis-nas-labece\/","title":{"rendered":"Network Analysis and Synthesis (NAS) Lab(ECE)"},"content":{"rendered":"[vc_row][vc_column width=”1\/4″][vc_wp_custommenu title=”Imp Links” nav_menu=”73″][\/vc_column][vc_column width=”3\/4″][vc_column_text]Introduction<\/strong>\u00a0<\/strong><\/span><\/p>\n

The Network Analysis and Synthesis (NAS) Lab<\/strong> is an essential part of the Electronics and Communication Engineering curriculum. It provides a practical understanding of electrical circuits, network theorems, and synthesis techniques through hands-on experiments. The lab uses tools such as MATLAB\/Simulink R2022b<\/strong> and the Two-Port T and PIE Networks Kit<\/strong> to help students to simulate circuits, analyze results, and validate theoretical concepts. It also enables students to study real circuit behavior, bridging the gap between theory and practice. The experiments focus on time-domain and frequency-domain analysis, two-port networks, and filter design, ensuring a strong foundation in circuit analysis and practical implementation.<\/span><\/p>\n

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Course Objectives <\/strong><\/span><\/p>\n\n\n\n\n\n\n
COB-1<\/span><\/td>\nUnderstand the transient response of a linear system for basic input waveforms<\/span><\/td>\n<\/tr>\n
COB-2<\/span><\/td>\nApply the network theorem for linear and time-invariant circuits.<\/span><\/p>\n

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COB-3<\/span><\/td>\n\u00a0Evaluate electrical two-port networks using Z, Y, h, and ABCD parameters<\/strong>,<\/strong> and analyze different interconnections.<\/span><\/td>\n<\/tr>\n
COB-4<\/span><\/td>\nDesign different types of filter circuits using Passive elements.<\/span><\/p>\n

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Course Outcomes <\/strong><\/span><\/p>\n\n\n\n\n\n\n\n
COs<\/strong><\/span><\/td>\nStatement<\/strong><\/span><\/td>\nBloom\u2019s Level<\/strong><\/span><\/td>\n<\/tr>\n
EEC 262.1<\/span><\/td>\nAbility to understand the transient response of a linear system for basic input waveforms<\/span><\/td>\nUnderstand<\/span><\/td>\n<\/tr>\n
EEC 262.2 \u00a0<\/span><\/td>\nAbility to apply the network theorem for linear and time-invariant circuits.<\/span><\/p>\n

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Apply<\/span><\/td>\n<\/tr>\n
EEC 262.3<\/span><\/td>\nAbility to evaluate electrical two-port networks using Z, Y, h, and ABCD parameters<\/strong>,<\/strong> and analyze different interconnections.<\/span><\/td>\nAnalyse, Evaluate<\/span><\/td>\n<\/tr>\n
EEC 262.4 \u00a0<\/span><\/td>\nAbility to design different types of filter circuits using Passive elements.<\/span><\/p>\n

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Design<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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CO-PO-PSO Mapping <\/strong><\/span><\/p>\n\n\n\n\n\n\n\n
CO\/PO<\/strong><\/span><\/td>\nPO1<\/strong><\/span><\/td>\nPO2<\/strong><\/span><\/td>\nPO3<\/strong><\/span><\/td>\nPO4<\/strong><\/span><\/td>\nPO5<\/strong><\/span><\/td>\nPO6<\/strong><\/span><\/td>\nPO7<\/strong><\/span><\/td>\nPO8<\/strong><\/span><\/td>\nPO9<\/strong><\/span><\/td>\nPO10<\/strong><\/span><\/td>\nPO11<\/strong><\/span><\/td>\nPO12<\/strong><\/span><\/td>\nPSO1<\/strong><\/span><\/td>\nPSO2<\/strong><\/span><\/td>\n<\/tr>\n
EEC 262.1<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
EEC 262.2\u00a0<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
EEC 262.3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
EEC 262.4\u00a0<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Facilities<\/strong><\/span><\/p>\n\n\n\n\n\n\n
Operating System \/Software <\/strong><\/span><\/td>\n<\/tr>\n
Sr. No.<\/span><\/td>\nName<\/strong><\/span><\/td>\nVersion<\/strong><\/span><\/td>\n<\/tr>\n
1.<\/span><\/td>\nWindows<\/span><\/td>\n10<\/span><\/td>\n<\/tr>\n
2.<\/span><\/td>\nMATLAB<\/span><\/p>\n

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R2022B<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Hardware <\/strong><\/span><\/td>\n<\/tr>\n
Sr. No.<\/strong><\/span><\/td>\nEquipment Name<\/strong><\/span><\/td>\nSpecification<\/strong><\/span><\/td>\nQuantity<\/strong><\/span><\/td>\n<\/tr>\n
1.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i5) 45705, 2.90 GHz\u00a0 RAM-4B\/8GB<\/span><\/td>\n4<\/span><\/td>\n<\/tr>\n
2.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i7) 8700, 3.20 GHz, RAM-8GB<\/span><\/td>\n7<\/span><\/td>\n<\/tr>\n
3.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nTWO PORT T & PIE NETWORKS KIT<\/span><\/td>\n\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0\u00a0 –<\/span><\/td>\n6<\/span><\/td>\n<\/tr>\n
4.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nPrinter<\/span><\/td>\nHP Laser Jet P1108<\/span><\/td>\n01<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Staff<\/strong><\/span><\/p>\n