{"id":17700,"date":"2026-10-17T04:50:38","date_gmt":"2026-10-17T04:50:38","guid":{"rendered":"https:\/\/bvcoend.ac.in\/?page_id=17700"},"modified":"2026-10-17T04:50:38","modified_gmt":"2026-10-17T04:50:38","slug":"computer-network-lab-cse-aiml","status":"publish","type":"page","link":"https:\/\/bvcoend.ac.in\/index.php\/computer-network-lab-cse-aiml\/","title":{"rendered":"Computer Network Lab &#8211; CSE-AIML"},"content":{"rendered":"[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_wp_custommenu title=&#8221;Imp Links&#8221; nav_menu=&#8221;91&#8243;][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text]\n<h3 style=\"color: #800000; margin-bottom: 4px; text-align: center;\"><strong>Computer Network Lab<\/strong><\/h3>\n<p style=\"margin-top: 0; margin-bottom: 16px;\"><span style=\"color: #000000;\"><strong>Subject Code:<\/strong> CIC<\/span><\/p>\n<table style=\"width: 100%; border-collapse: collapse; margin-bottom: 20px;\" border=\"1\">\n<tbody>\n<tr>\n<td style=\"padding: 10px; width: 25%; background-color: #f2f2f2;\"><span style=\"color: #000000;\"><strong>Faculty Coordinator<\/strong><\/span><\/td>\n<td style=\"padding: 10px;\"><span style=\"color: #000000;\">Ms. Rajni<\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"padding: 10px; background-color: #f2f2f2;\"><span style=\"color: #000000;\"><strong>Lab Technician<\/strong><\/span><\/td>\n<td style=\"padding: 10px;\"><span style=\"color: #000000;\">Vinay Kumar<\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"padding: 10px; background-color: #f2f2f2;\"><span style=\"color: #000000;\"><strong>Simulation Facilities<\/strong><\/span><\/td>\n<td style=\"padding: 10px;\"><span style=\"color: #000000;\">StarUML<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<h4 style=\"color: #800000; margin-bottom: 8px;\"><strong>Introduction<\/strong><\/h4>\n<p style=\"text-align: justify; line-height: 1.6; margin-bottom: 18px;\"><span style=\"color: #000000;\">The Digital Logic and Computer Design Lab of the CSE-AIML Department lays a strong foundation for understanding, designing, and implementing digital circuits, from the gate level to a simple digital system; it also helps students develop knowledge of processor (8085) architecture and programming skills. This helps students turn basic ideas into a working prototype. The lab provides facilities for software simulation using a state-of-the-art tool.<\/span><\/p>\n<h4 style=\"color: #800000; margin-bottom: 8px;\"><strong>Objectives of the Laboratory<\/strong><\/h4>\n<table style=\"width: 100%; border-collapse: collapse; margin-bottom: 20px;\" border=\"1\">\n<thead>\n<tr style=\"background-color: #f2f2f2;\">\n<th style=\"padding: 10px; text-align: center; width: 12%;\"><span style=\"color: #000000;\">S. No.<\/span><\/th>\n<th style=\"padding: 10px; text-align: left;\"><span style=\"color: #000000;\">Objective<\/span><\/th>\n<\/tr>\n<\/thead>\n<tbody>\n<tr>\n<td style=\"padding: 8px; text-align: center;\"><span style=\"color: #000000;\">1<\/span><\/td>\n<td style=\"padding: 8px;\"><span style=\"color: #000000;\">Ability to understand Boolean Algebra and Design Combinational Circuits.<\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"padding: 8px; text-align: center;\"><span style=\"color: #000000;\">2<\/span><\/td>\n<td style=\"padding: 8px;\"><span style=\"color: #000000;\">Ability to understand and Design Sequential Circuits.<\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"padding: 8px; text-align: center;\"><span style=\"color: #000000;\">3<\/span><\/td>\n<td style=\"padding: 8px;\"><span style=\"color: #000000;\">Ability to understand the design of a basic computer.<\/span><\/td>\n<\/tr>\n<tr>\n<td style=\"padding: 8px; text-align: center;\"><span style=\"color: #000000;\">4<\/span><\/td>\n<td style=\"padding: 8px;\"><span style=\"color: #000000;\">Ability to understand Input-Output and Memory Organization of a Computer.<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n<p><img loading=\"lazy\" class=\"aligncenter wp-image-17701\" src=\"https:\/\/bvcoend.ac.in\/wp-content\/uploads\/2026\/10\/Screenshot-2026-10-17-101907-1024x621.png\" alt=\"\" width=\"649\" height=\"394\" srcset=\"https:\/\/bvcoend.ac.in\/wp-content\/uploads\/2026\/10\/Screenshot-2026-10-17-101907-1024x621.png 1024w, https:\/\/bvcoend.ac.in\/wp-content\/uploads\/2026\/10\/Screenshot-2026-10-17-101907-300x182.png 300w, https:\/\/bvcoend.ac.in\/wp-content\/uploads\/2026\/10\/Screenshot-2026-10-17-101907-768x466.png 768w, https:\/\/bvcoend.ac.in\/wp-content\/uploads\/2026\/10\/Screenshot-2026-10-17-101907.png 1445w\" sizes=\"(max-width: 649px) 100vw, 649px\" \/>[\/vc_column_text][\/vc_column][\/vc_row]\n","protected":false},"excerpt":{"rendered":"<p>[vc_row][vc_column width=&#8221;1\/4&#8243;][vc_wp_custommenu title=&#8221;Imp Links&#8221; nav_menu=&#8221;91&#8243;][\/vc_column][vc_column width=&#8221;3\/4&#8243;][vc_column_text] Computer Network Lab Subject Code: CIC Faculty Coordinator Ms. Rajni Lab Technician Vinay Kumar Simulation Facilities StarUML Introduction The Digital Logic and Computer Design Lab of the CSE-AIML Department lays a strong foundation for understanding, designing, and implementing digital circuits, from the gate level to a simple digital system;&hellip;<\/p>\n","protected":false},"author":1,"featured_media":0,"parent":0,"menu_order":0,"comment_status":"closed","ping_status":"closed","template":"","meta":[],"_links":{"self":[{"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/pages\/17700"}],"collection":[{"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/pages"}],"about":[{"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/types\/page"}],"author":[{"embeddable":true,"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/comments?post=17700"}],"version-history":[{"count":1,"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/pages\/17700\/revisions"}],"predecessor-version":[{"id":17702,"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/pages\/17700\/revisions\/17702"}],"wp:attachment":[{"href":"https:\/\/bvcoend.ac.in\/index.php\/wp-json\/wp\/v2\/media?parent=17700"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}