{"id":2979,"date":"2021-02-18T09:28:51","date_gmt":"2021-02-18T09:28:51","guid":{"rendered":"https:\/\/bvcoend.ac.in\/?page_id=2979"},"modified":"2026-03-18T04:43:23","modified_gmt":"2026-03-18T04:43:23","slug":"digital-signal-processing-lab-ece","status":"publish","type":"page","link":"https:\/\/bvcoend.ac.in\/index.php\/digital-signal-processing-lab-ece\/","title":{"rendered":"Digital Signal Processing LAB"},"content":{"rendered":"[vc_row][vc_column width=”1\/4″][vc_wp_custommenu title=”Imp Links” nav_menu=”73″][\/vc_column][vc_column width=”3\/4″][vc_column_text]Introduction<\/strong><\/span><\/p>\n

The\u00a0Digital Signal Processing Lab<\/strong>\u00a0at Electronics and Communication Engineering Department of Bharati Vidyapeeth\u2019s College of engineering, New Delhi campus is designed to provide students with practical experience in signal analysis, filtering, and transformation techniques using\u00a0MATLAB<\/strong>. This laboratory focuses on implementing and analyzing key DSP concepts, enabling students to develop efficient signal processing algorithms for applications in\u00a0communications, audio processing, biomedical engineering, and control systems<\/strong>.<\/span><\/p>\n

“The goal of the DSP Lab is to transform mathematical elegance into functional technology.”<\/span><\/p>\n

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Course Objectives <\/strong><\/span><\/p>\n\n\n\n\n\n\n
COB-1<\/span><\/td>\nTo impart the basic knowledge of DFT, its properties, FFT and its applications.<\/span><\/td>\n<\/tr>\n
COB-2<\/span><\/td>\nTo impart the knowledge of designing and realization of FIR filters.<\/span><\/td>\n<\/tr>\n
COB-3<\/span><\/td>\nTo impart the knowledge of designing and realization of IIR filters<\/span><\/td>\n<\/tr>\n
COB-4<\/span><\/td>\nTo impart the knowledge of quantization errors in Digital Signal Processing and the concept of Multirate signal processing.<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

\u00a0<\/strong><\/span><\/p>\n

Course Outcomes <\/strong><\/span><\/p>\n\n\n\n\n\n\n\n
CO No.<\/strong><\/span><\/td>\nCourse Outcome Statement<\/strong><\/span><\/td>\nBloom\u2019s Level<\/strong><\/span><\/td>\n<\/td>\n<\/tr>\n
ECC-351.1<\/strong><\/span><\/td>\nTo understand the basic concept of DFT and FFT.<\/span><\/td>\nUnderstand<\/strong><\/span><\/td>\n<\/td>\n<\/tr>\n
ECC-351.2<\/strong><\/span><\/td>\nTo acquire a clear idea of FIR filter designing techniques and realization methods.<\/span><\/td>\nApply \/ Analyze<\/strong><\/span><\/td>\n<\/td>\n<\/tr>\n
ECC-351.3<\/strong><\/span><\/td>\nTo understand the IIR filter designing techniques and realization methods and the stability.<\/span><\/td>\nApply \/ Analyze<\/strong><\/span><\/td>\n<\/td>\n<\/tr>\n
ECC-351.4<\/strong><\/span><\/td>\nTo understand the quantization errors in Digital Signal Processing and the concept of Multi-rate signal processing.<\/span><\/td>\nUnderstand \/ Analyze<\/strong><\/span><\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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ECC-351.PO-PSO Mapping <\/strong><\/span><\/p>\n\n\n\n\n\n\n\n
CO\/PO<\/strong><\/span><\/td>\nPO1<\/strong><\/span><\/td>\nPO2<\/strong><\/span><\/td>\nPO3<\/strong><\/span><\/td>\nPO4<\/strong><\/span><\/td>\nPO5<\/strong><\/span><\/td>\nPO6<\/strong><\/span><\/td>\nPO7<\/strong><\/span><\/td>\nPO8<\/strong><\/span><\/td>\nPO9<\/strong><\/span><\/td>\nPO10<\/strong><\/span><\/td>\nPO11<\/strong><\/span><\/td>\nPO12<\/strong><\/span><\/td>\nPSO1<\/strong><\/span><\/td>\nPSO2<\/strong><\/span><\/td>\n<\/tr>\n
ECC-351.1<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n1<\/span><\/td>\n\u2013<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n
ECC-351.2<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n1<\/span><\/td>\n\u2013<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n
ECC-351.3<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n1<\/span><\/td>\n\u2013<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n
ECC-351.4<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n\u2013<\/span><\/td>\n1<\/span><\/td>\n\u2013<\/span><\/td>\n2<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Facilities<\/strong><\/span><\/p>\n\n\n\n\n\n\n
Operating System \/Software<\/strong><\/span><\/td>\n<\/tr>\n
Sr. No.<\/span><\/td>\nName<\/strong><\/span><\/td>\nVersion<\/strong><\/span><\/td>\n<\/tr>\n
1.<\/span><\/td>\nWindows<\/span><\/td>\n10<\/span><\/td>\n<\/tr>\n
2.<\/span><\/td>\nMATLAB<\/span><\/td>\n2022B<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

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Hardware <\/strong><\/span><\/td>\n<\/tr>\n
Sr. No.<\/strong><\/span><\/td>\nEquipment Name<\/strong><\/span><\/td>\nSpecification<\/strong><\/span><\/td>\nQuantity<\/strong><\/span><\/td>\n<\/tr>\n
1.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i5) 7th<\/sup> gen ,\u00a0 RAM-16GB<\/span><\/td>\n4<\/span><\/td>\n<\/tr>\n
2.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i5) 6th<\/sup> gen ,\u00a0 RAM-16GB,4GB<\/span><\/td>\n3<\/span><\/td>\n<\/tr>\n
3.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i5) 5th<\/sup> gen ,\u00a0 RAM-16GB,4GB<\/span><\/td>\n12<\/span><\/td>\n<\/tr>\n
4.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nComputer<\/span><\/td>\nIntel Core (i5) 4th Generation 2.90GHz ,RAM-16GB<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
5.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nPrinter<\/span><\/td>\nHP Laser Jet Pro P1108 Plus<\/span><\/td>\n01<\/span><\/td>\n<\/tr>\n
6.\u00a0\u00a0\u00a0\u00a0\u00a0 \u00a0<\/span><\/td>\nDigital Smart Board<\/span><\/td>\nSense Edge 75 inch<\/span><\/td>\n01<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

\u00a0<\/strong><\/span><\/p>\n

Staff<\/strong><\/span><\/p>\n