{"id":2983,"date":"2021-02-18T09:33:00","date_gmt":"2021-02-18T09:33:00","guid":{"rendered":"https:\/\/bvcoend.ac.in\/?page_id=2983"},"modified":"2026-03-18T06:03:13","modified_gmt":"2026-03-18T06:03:13","slug":"vlsi-lab-ece","status":"publish","type":"page","link":"https:\/\/bvcoend.ac.in\/index.php\/vlsi-lab-ece\/","title":{"rendered":"VLSI LAB"},"content":{"rendered":"[vc_row][vc_column width=”1\/4″][vc_wp_custommenu title=”Imp Links” nav_menu=”73″][\/vc_column][vc_column width=”3\/4″][vc_column_text]\n

VLSI LAB<\/span><\/h3>\n

Introduction<\/span><\/h3>\n

The aim of VLSI lab is to provide an experimental platform for the students to design and implement logic using MOS switches. In this lab, students implement transistor level logic circuits (experiments as per university prescribed syllabus) for various combinational\/sequential circuits like gates, adders, flip-flops, RAM, etc. The prerequisite for the lab is knowledge of digital electronics and CMOS-based design methodologies, which are covered in theory classes during their present\/earlier semesters. The methodology of the lab is to explain the theory as well as logic involved in the experiment. Students then implement the explained logic according to the stated design constraints, during lab hours, individually.<\/span><\/p>\n

Course Objectives<\/span><\/h3>\n\n\n\n\n\n\n
COB-1<\/strong><\/span><\/td>\nTo understand the fundamental concepts of VLSI technology and design basic CMOS circuits for digital applications.<\/span><\/td>\n<\/tr>\n
COB-2<\/strong><\/span><\/td>\nTo apply advanced VLSI design techniques including pipelining, memory design, low-power methodologies, and FPGA programming.<\/span><\/td>\n<\/tr>\n
COB-3<\/strong><\/span><\/td>\nTo analyze and simulate complex VLSI circuits, including analog, mixed-signal, and high-frequency designs, considering noise, timing, and manufacturability challenges.<\/span><\/td>\n<\/tr>\n
COB-4<\/strong><\/span><\/td>\nTo integrate VLSI components into complex systems, manage VLSI projects, and understand real-world applications and ethical considerations in VLSI technology.<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Course Outcomes<\/span><\/h3>\n\n\n\n\n\n\n\n\n
CO<\/span><\/th>\nStatement<\/span><\/th>\nBloom\u2019s Level<\/span><\/th>\n<\/tr>\n<\/thead>\n
ECC258.1<\/strong><\/span><\/td>\nUnderstand the fundamental concepts of VLSI technology and design basic CMOS circuits for digital applications.<\/span><\/td>\nUnderstand, Remember<\/span><\/td>\n<\/tr>\n
ECC258.2<\/strong><\/span><\/td>\nApply advanced VLSI design techniques including pipelining, memory design, low-power methodologies, and FPGA programming.<\/span><\/td>\nApply<\/span><\/td>\n<\/tr>\n
ECC258.3<\/strong><\/span><\/td>\nAnalyze and simulate complex VLSI circuits, including analog, mixed-signal, and high-frequency designs, considering noise, timing, and manufacturability challenges.<\/span><\/td>\nCreate<\/span><\/td>\n<\/tr>\n
ECC258.4<\/strong><\/span><\/td>\nIntegrate VLSI components into complex systems, manage VLSI projects, and understand real-world applications and ethical considerations in VLSI technology.<\/span><\/td>\nAnalyze, Evaluate<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

CO-PO-PSO Mapping<\/span><\/h3>\n\n\n\n\n\n\n\n\n
CO\/PO<\/span><\/th>\nPO1<\/span><\/th>\nPO2<\/span><\/th>\nPO3<\/span><\/th>\nPO4<\/span><\/th>\nPO5<\/span><\/th>\nPO6<\/span><\/th>\nPO7<\/span><\/th>\nPO8<\/span><\/th>\nPO9<\/span><\/th>\nPO10<\/span><\/th>\nPO11<\/span><\/th>\nPO12<\/span><\/th>\nPSO1<\/span><\/th>\nPSO2<\/span><\/th>\n<\/tr>\n<\/thead>\n
ECC258.1<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n<\/td>\n<\/tr>\n
ECC258.2<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n<\/td>\n<\/tr>\n
ECC258.3<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n<\/td>\n<\/tr>\n
ECC258.4<\/strong><\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n3<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n<\/td>\n<\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n1<\/span><\/td>\n2<\/span><\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

\"\"Facilities<\/span><\/h3>\n

Operating System \/ Software<\/span><\/h4>\n\n\n\n\n\n\n
Sr. No.<\/span><\/th>\nName<\/span><\/th>\nVersion<\/span><\/th>\n<\/tr>\n<\/thead>\n
1.<\/span><\/td>\nWindows<\/span><\/td>\n10<\/span><\/td>\n<\/tr>\n
2.<\/span><\/td>\nMentographics Tanner (HEP-1) & (HEP-2)<\/span><\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Hardware<\/span><\/h4>\n\n\n\n\n\n\n\n\n\n\n
Sr.No.<\/span><\/th>\nEquipment Name<\/span><\/th>\nSpecification<\/span><\/th>\nQuantity<\/span><\/th>\n<\/tr>\n<\/thead>\n
1.<\/span><\/td>\nComputer System<\/span><\/td>\nIntel Core i9 10 Gen 2.10 GH 32 GB RAM<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
2.<\/span><\/td>\nComputer System<\/span><\/td>\nIntel Core i5 4 Gen 2.10 GH 16 GB RAM<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n
3.<\/span><\/td>\nComputer System<\/span><\/td>\nIntel Core i7 8 Gen 3.10 GH 8 GB RAM<\/span><\/td>\n2<\/span><\/td>\n<\/tr>\n
4.<\/span><\/td>\nComputer System<\/span><\/td>\nIntel Core i5 10 Gen 2.10 GH 8 GB RAM<\/span><\/td>\n27<\/span><\/td>\n<\/tr>\n
5.<\/span><\/td>\nComputer System<\/span><\/td>\nGPU System<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n
6.<\/span><\/td>\nPrinter<\/span><\/td>\nHP Laser Jet Pro P1108<\/span><\/td>\n1<\/span><\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n

Staff<\/span><\/h3>\n