Lab Room No: A308
Lab In charge: Dr. K.Sudha
Lab Attendant: Mr. Ankit Kumar
Lab Subjects: Switching Theory and Digital Logic Design-ETEE 355(V SEM)
The objective of the lab is to facilitate the student with the knowledge of Logic Systems and Circuits, thereby enabling the student to obtain the platform for studying Digital Systems and Computer Architecture. It enables the students to analyze the results of logic and timing simulations and to use these simulation results to debug digital systems. This lab helps to learn to design combinational and sequential digital systems starting from a word description that performs a set of specified tasks and functions. This lab is focus on design of different type of circuits that increase understanding of course. The students design and implement a final digital project of their choice.
List of Experiment:
- (a)To study basic gates and verify their truth tables.
(b) To study universal gates and special function gates and verify their truth tables
- Realize all basic gates using universal gates.
- To verify following laws of Boolean algebra :
(i) AB+ ĀB= B
(ii) Demorgon’s theorem
- Design half adder and full adder using NAND gates/basic gates/Ex-or gates.
- Design half subtractor and full subtractor using NAND gates/basic gates/Ex-or gates.
- Design 2-bit magnitude comparator.
- Analyze a 4:1 MUX using NAND gates only.
- Design 3 bit Binary to gray code convertor.
- Design S-R flip flop using NANDs logic gates.
- Design 3-bit synchronous counter.