Digital System Design Lab
Digital System Design is for V semester students. The aim of the DSD lab is to provide experimental platform for the students to code and implement the RTL level design using VHDL language which is part of their core subject. In this lab students implement VHDL programs (experiments as per university prescribed syllabus) for various combinational/sequential circuit examples adders, decoders, encoders, multiplexer, demultipulxer, FFs, counters etc. For this lab the prerequisites are the knowledge of digital electronics which students study in earlier semesters. The methodology of the lab is to explain the theory as well as logic involved in class/lab. Then students code and implement the explained logic according to the stated coding style, during lab hours, individually.
Objective of Laboratory:
- Introduce the concept of digital systems through hardware language like VHDL.
- To be able to design and analyze combinational and sequential logic circuits.
- Understand the basic software tools for the design and implementation of digital circuits and systems.
- Emphasize theory and techniques taught in the classroom through experiments and projects in the laboratory.
Courses to cater:
- ETEC 351 Digital system design Lab
- Simulation Facilities: HEP1 and HEP2 tools from Mentor Graphics.
- Hardware Facilities: Spartan series, Zed board, Zybo board FPGA.
- Faculty Coordinator: Dr. Manoj Sharma
- Other Faculty Users: Ms. Yogita Arora, Ms. Monica Gupta
- Lab Technician: Mr. Rajesh Shukla