Objective of Lab:
To enhance the knowledge and skill of the students in MOS based design with emphasis on CMOS topology.
VLSI Design Lab is part of VI semester syllabus for ECE program. The aim of the lab is to provide an experimental platform for the students to design and implement logic using MOS switches. In this lab, students implement transistor level logic- circuits (experiments as per university prescribed syllabus) for various combinational/sequential circuit like gates, adders, FFs etc. The prerequisite for the lab is knowledge of digital electronics and CMOS based design methodologies, which are covered in theory classes during their present/earlier semesters. The methodology of the lab is to explain the theory as well as logic involved in the experiment. Students then implement the explained logic according to the stated design constraints, during lab hours, individually.
- Simulation tools: Mentor Graphics HEP1 and HEP2
- Computer Systems: 2 server installation, 1 machine HEP and 22 client machines and 1 Lab assistant machines
- Hardware: Printer
- Faculty In-charge: Dr. Manoj Sharma
- Other Faculty Users: Ms. Monica Gupta, Ms. Annu Dabas
- Lab Technician: Ms. Asha Saini